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  Code and Data Location

Instruction and data caching can show dramatic improvement in the execution time of many applications in which the path of execution is single threaded. Much research has been done to show that for many applications, both instruction and data accesses are frequently very localized and hence benefit immensely from caching.

However, in a multitasking environment, the thread of execution is not so linear. Task switches require stack switching and context saving and restoral. These switches, often in response to interrupt activity, interfere with the seqential instruction execution process thereby negating some of the benefits of instruction caching.

The position of code and data in memory can also affect the caching performance as the following example illustrates. Assume that two code modules, A and B, are located in memory at addresses 0x1000 and 0x2000 respectively as shown in the diagram below. Assume that each module occupies less than 1024 bytes, the size of the instruction cache. Also assume that addresses map directly to the cache using the least significant 10 bits of the address.

 
 

Module A   Module B

void Ahigh()
{
 
}


void Alow()
{
 
}

0x1000

 

void Bhigh()
{
 
}


void Blow()
{
 
}

0x2000

 
 

If procedure Bhigh in module B repeatedly calls procedure Alow in module A, both procedures will end up in cache and benefit accordingly.

However, if procedure Bhigh in module B repeatedly calls procedure Ahigh in module A, the procedures will compete with each other for residence in the cache and performance will suffer.

Few applications are small enough to permit the fine tuning necessary to achieve optimal code location for maximum cache benefit. It is more likely that your code, and the procedures which it calls, will simply end up in memory at locations which vary with every minor code change. Move any block of code up or down in memory with respect to the other blocks of code with which it interacts and you can expect execution timing differences with caching enabled.


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